In recent years, several companies have developed and are marketing microprocessors of the type employing a number of address lines, bi-directional data lines, and certain command signal lines. There has been a substantial amount of effort devoted to the concept of incorporating this type of miniaturized device into a total programmable controller system. In such a system, a number of external locations are employed to input information to the programmable controller and to output information from the programmable controller. These external locations are often single bit data locations, which are addressable by an appropriate address appearing on the address lines of the programmable controller. In some systems, the various external locations are designated as either input locations or output locations. Thus, certain external locations can be used only for a given type of function. In the application incorporated by reference herein, various external locations are single bit data locations which can be either input, output or data storage locations. In this manner, a single group of external locations can be connected with selected combinations of input or output functions. This concept substantially simplifies the operation of the programmable controller and causes a corresponding reduction in price and increase in versatility. In many programmable controllers, the central processing unit must be able to update the various external locations and read the existing conditions from various external locations. To do this, an appropriate address corresponding to the external location is directed to the address lines, which address selects the particular external location and either input data from the location, on a READ command, or places data in the external locations on a WRITE command. These programmed commands appear on the terminals available in any of various standard microprocessors which can be used as a central processing unit of a programmable controller system. Such systems require complicated circuitry for holding the logic at various external locations and for reading from these external locations. One of the difficulties is that the programmable controller operates at a relatively high speed and some of the external locations can not function as rapidly as desired. In addition, if the locations are spaced substantially from the system, the communication time between the various external locations can greatly exceed the normal machine cycle time of the programmable controller. Thus, the programmable controller must wait for external communications. As an alternative, the spacing of various external locations is limited according to the communication time required in relationship to the operating time of the programmable controller. Some programmable controllers operate directly upon the external locations during a READ or WRITE command. This again presents processing time problems and increases the complexity of circuitry used to communicate between external locations and the central processing unit. In some systems, it has been suggested that the controller read and update the external locations during each program cycle. This requires substantial program space and increases the execution time for each program process cycle.
All of these disadvantages have been overcome by the present invention which relates to a system for monitoring logic conditions at external addressable locations having known addresses in a programmable controller of the type including address lines, at least one bi-directional data line, a WRITE line for receiving a programmed WRITE signal and a READ line for receiving a programmed READ signal.
In accordance with the present invention, a system as described above, includes an output memory unit having a memory location for each external location; an input memory unit having a memory location for each external location; means for writing data from the data line into one of the memory locations of each of the memory units upon creation of a selected one of the known addresses on the address lines and a programmed WRITE signal; means for reading data from a memory location in the input memory unit upon creation of a selected one of the known addresses on the address lines and a programmed READ signal; means for generating the known addresses on auxiliary lines in series and independent of the address lines, means for generating a hardwired WRITE signal independent of the programmed WRITE signal and concurrent with a generated known address; means for generating a hardwired READ signal independent of the programmed READ signal and concurrent with a generated known address; means responsive to one of the hardwired signals for directing data from the output memory unit to one of the external locations addressed by the corresponding generated address; and, means responsive to the other of the hardwired signals for directing data corresponding to the logic condition of one of the external locations to the input memory unit.
By providing the intermediate input and output memory units, which could be combined as a single unit, the memory units themselves are used for storing the logic conditions of external addressable locations. The CPU of the programmable controller can then communicate with the intermediate memory units to either update the external addressable locations or receive information corresponding to their intended logic conditions. Thus, the intermediate memory units form the communication between the programmable controller and the external addressable locations. In this manner, the input and output circuitry can be operated independent of the CPU of the programmable controller. The intermediate memory units store new data for the external locations, which are then updated.
In acccordane with another aspect of the present invention, there is provided a scanning circuit for continuously scanning fictitiously created addresses corresponding to the addresses of the external locations. This scanning operation and creation of fictitious addresses is independent of the CPU system and allows updating of the external locations according to the current condition of the intermediate memory units. When the CPU creates a command to change an external condition, the scanning circuit is disabled and the intermediate memory reads an address from the CPU and updates the location at the memory address. Thereafter, the scanning circuit continues and ultimately shifts this new data, at its convenience, to the proper external location. As external conditions change, such as the closing of a switch forming an input location, the scanning circuit changes the data at the intermediate memory location when a fictitiously created address corresponds to the external input location. Thereafter, when the CPU reads the external locations, this modified information or data is available at the intermediate memory for use by the CPU controlled section of the programmable controller.
The primary object of the present invention is the provision of a system for monitoring the logic conditions at external addressable locations in a programmable controller, which system can be incorporated into a programmable controller to isolate CPU processing from external location processing.
Another object of the present invention is the provision of a system, as defined above, which system can be incorporated into a programmable controller, without modifying the basic features of the programmable controller.
Another object of the present invention is the provision of a system, as defined above, which system allows use of extremely remote external locations without affecting the timing used in processing information by the CPU of the programmable controller.
Another object of the present invention is the provision of a system, as defined above, which system allows external locations to be used as either inputs, outputs or memory locations for the programmable controller.
Another object of the present invention is the provision of a system, as defined above, which system incorporates a scanning circuit for updating external locations with fictitiously created addresses and interruptable by the CPU of the programmable controller for access to information indicative of the conditions of the external locations.
Still another object of the present invention is the provision of a system, as defined above, which system does not require communication with the external locations by the central processing unit or communication during each program cycle.
These and other objects and advantages will become apparent from the following description taken together with the accompanying drawings.